Development of digital low level rf system

Michizono, Shinichiro*; Anami, Shozo*; Katagiri, Hiroaki*; Fang, Z.*; Matsumoto, Toshihiro*; Miura, Takako*; Yano, Yoshiharu*; Yamaguchi, Seiya*; Kobayashi, Tetsuya

One of the biggest advantages of the digital low level rf (LLRF) system is its flexibility. Owing to the recent rapid progress in digital devices (such as ADCs and DACs) and telecommunication devices (mixers and IQ modulators), digital LLRF system for accelerators becomes popular in these 10 years. The J-PARC linac LLRF system adopted cPCI crates and FPGA based digital feedback system. After the successful operation of J-PARC linac LLRF system, we developed the STF (ILC test facility in KEK) LLRF system. The future R&D projects (ILC and ERL) are also described from the viewpoints of LLRF.

Language	:	Japanese
Journal	:	Kasokuki
Volume	:	5
Number	:	2
Pages	:	p.127 - 136
Publication Year/Month	:	2008/07
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Paper URL	:	http://ci.nii.ac.jp/naid/40016192805
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Keywords	:	no keyword
Research Facility	:	J-PARC加速器
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Registration No. : AA20080216
JAEA Abstracts No. : 36001475
Paper Submission No. : 4767

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