Optimization for SEU/SET immunity on 0.15 m fully depleted CMOS/SOI digital logic devices

Makihara, Akiko*; Asai, Hiroaki*; Tsuchiya, Yoshihisa*; Amano, Yukio*; Midorikawa, Masahiko*; Shindo, Hiroyuki*; Kuboyama, Satoshi*; Onoda, Shinobu; Hirao, Toshio; Nakajima, Yasuhito*; Takahashi, Yoshihiro*; Onishi, Kazunori*

no abstracts in English

Language	:	English
Journal	:	Proceedings of 7th International Workshop on Radiation Effects on Semiconductor Devices for Space Application (RASEDA-7)
Volume	:
Number	:
Pages	:	p.95 - 98
Publication Year/Month	:	2006/10
Meeting title	:	7th International Workshop on Radiation Effects on Semiconductor Devices for Space Application (RASEDA-7)
Held date	:	2006/10
Location (city)	:	Takasaki
Location (country)	:	Japan
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DOI for research data	:
Keywords	:	no keyword
Research Facility	:	TIARA(イオン照射研究施設)
Press Release	:
Article of JAEA R&D Review	:
Cooperating Institute	:	宇宙航空研究開発機構

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Registration No. : BB20063316
JAEA Abstracts No. : 35000692
Paper Submission No. : 2181

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