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Soft-error rate in a logic LSI estimated from SET pulse-width measurements

Makino, Takahiro; Kobayashi, Daisuke*; Hirose, Kazuyuki*; Takahashi, Daisuke*; Ishii, Shigeru*; Kusano, Masaki*; Onoda, Shinobu; Hirao, Toshio; Oshima, Takeshi

SET-induced soft-error rates ($$SER_{SET}$$s) of logic LSIs are estimated from SET pulse-widths measured in logic cells used in logic LSIs. The estimated rates are consistent with directly measured $$SER_{SET}$$s for logic LSIs.

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Category:Engineering, Electrical & Electronic

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