Measurement and mechanism investigation of negative and positive muon-induced upsets in 65-nm Bulk SRAMs

Liao, W.*; Hashimoto, Masanori*; Manabe, Seiya*; Watanabe, Yukinobu*; Abe, Shinichiro   ; Nakano, Keita*; Sato, Hikaru*; Kin, Tadahiro*; Hamada, Koji*; Tampo, Motonobu*; Miyake, Yasuhiro*

Soft error induced by secondary cosmic-ray muon is concerned since susceptibility of semiconductor device to soft error increases with the scaling of technology. In this study, we have performed irradiation tests of muons on 65-nm bulk CMOS SRAM in the Japan Proton Accelerator Research Complex (J-PARC) and measured soft error rate (SER) to investigate mechanism of muon-induced soft errors. It was found that SER by negative muon increases above 0.5 V supply voltage, although SER by positive muon increases monotonically as the supply voltage lowers. SER by negative muon also increases with forward body bias. In addition, negative muon causes large multiple cell upset (MCU) of more than 20 bits and the ratio of MCU events to all the events is 66% at 1.2V supply voltage. These tendencies indicate that parasitic bipolar action (PBA) is highly possible to contribute to SER by negative muon. Experimental data are analyzed by PHITS. It was found that negative muon can deposit larger charge than positive muon, and such events that can deposit large charge may trigger PBA.