Impact of post-nitridation annealing in CO ambient on threshold voltage stability in 4H-SiC metal-oxide-semiconductor field-effect transistors

Hosoi, Takuji*; Osako, Momoe*; Moges, K.*; Ito, Koji*; Kimoto, Tsunenobu*; Sometani, Mitsuru*; Okamoto, Mitsuo*; Yoshigoe, Akitaka ; Shimura, Takayoshi*; Watanabe, Heiji*

The combination of NO annealing and subsequent post-nitridation annealing (PNA) in CO ambient for SiO/SiC structures has been demonstrated to be effective in obtaining both high channel mobility and superior threshold voltage stability in SiC-based metal-oxide-semiconductor field-effect transistors (MOSFETs). N atoms on the SiO side of the SiO/SiC interface incorporated by NO annealing, which are plausible cause of charge trapping sites, could be selectively removed by CO-PNA at 1300C without oxidizing the SiC. CO-PNA was also effective in compensating oxygen vacancies in SiO, resulting high immunity against both positive and negative bias-temperature stresses.