An Advanced digital feedback control system design for the muon linear accelerator

Cicek, E.*; Ego, Hiroyasu*; Futatsukawa, Kenta*; Mibe, Tsutomu*; Otani, Masashi*; Saito, Naohito*; Yoshida, Mitsuhiro*; Iinuma, Hiromi*; Nakazawa, Yuga*; Iwata, Yoshiyuki*; Kitamura, Ryo   ; Kondo, Yasuhiro   ; Morishita, Takatoshi  ; Ibaraki, Yuka*; Sue, Yuki*; Sumi, Kazumichi*; Yotsuzuka, Mai*; Takeuchi, Yusuke*; Hayashizaki, Noriyosu*

A unique muon linear accelerator (linac) for the muon g-2/EDM experiment at J-PARC is under development. Digital feedback (DFB) design employed in a low-level radio frequency (LLRF) control system is crucial to fulfilling the required RF amplitude and phase specifications in the RF cavities for a stable and continuous acceleration of the whole bunched particles. To this end, a micro telecommunications computing architecture.4 (MicroTCA.4)-based compact and in-house DFB design, using VadaTech commercial off-the-shelf (COTS) RF system-on-chip (RFSoC) advanced mezzanine card (AMC), is aimed for the muon linac. This feedback control system will employ a direct sampling method that reduces the project cost by requiring less hardware employment for ultra-high frequency (UHF) and L-band accelerating structures. The present status and first results of the project will be reported in this paper.