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/AlON stacked gate dielectrics for AlGaN/GaN MOS heterojunction field-effect transistorsWatanabe, Kenta*; Terashima, Daiki*; Nozaki, Mikito*; Yamada, Takahiro*; Nakazawa, Satoshi*; Ishida, Masahiro*; Anda, Yoshiharu*; Ueda, Tetsuzo*; Yoshigoe, Akitaka; Hosoi, Takuji*; et al.
Japanese Journal of Applied Physics, 57(6S3), p.06KA03_1 - 06KA03_6, 2018/06
Times Cited Count：4 Percentile：32.09(Physics, Applied)The advantage of SiO/AlON stacked gate dielectrics over SiO, AlON and AlO
single dielectric layers was demonstrated. Our systematic research revealed that the optimized stacked structure with 3.3-nm-thick AlON interlayer is beneficial in terms of superior interface quality, reduced gate leakage current and C-V hysteresis for next-generation high frequency and high power AlGaN/GaN MOS-HFETs.
Nozaki, Mikito*; Watanabe, Kenta*; Yamada, Takahiro*; Shih, H.-A.*; Nakazawa, Satoshi*; Anda, Yoshiharu*; Ueda, Tetsuzo*; Yoshigoe, Akitaka; Hosoi, Takuji*; Shimura, Takayoshi*; et al.
Japanese Journal of Applied Physics, 57(6S3), p.06KA02_1 - 06KA02_7, 2018/06
Times Cited Count：4 Percentile：32.09(Physics, Applied)We fabricated AlON dielectric films by repeating thin AlN deposition and in situ O oxidation for AlGaN/GaN MOS-HFETs. Uniform nitrogen distribution is achievable by the proposed ALD-based process and that nitrogen concentration can be precisely controlled by changing AlN thickness (ALD cycle number) in each step. It was found that AlON films grown by ALD system offers significant advantages in terms of practical application while keeping superior Vth stability and electrical properties at the insulator/AlGaN interface in AlGaN/GaN MOS-HFETs.
/GaN stacks for high-quality GaN-based metal-oxide-semiconductor devices with improved gate dielectric reliabilityYamada, Takahiro*; Watanabe, Kenta*; Nozaki, Mikito*; Yamada, Hisashi*; Takahashi, Tokio*; Shimizu, Mitsuaki*; Yoshigoe, Akitaka; Hosoi, Takuji*; Shimura, Takayoshi*; Watanabe, Heiji*
Applied Physics Express, 11(1), p.015701_1 - 015701_4, 2018/01
Times Cited Count：9 Percentile：12.47(Physics, Applied)A simple and feasible method for fabricating high-quality and highly reliable GaN-based metal-oxide-semiconductor (MOS) devices was developed on the basis of systematic physical and electrical characterizations. Chemical vapor deposition of SiO films directly onto GaN substrates forming Ga-oxide interlayers was used to fabricate SiO/GaO
/GaN stacked structures. Although well-behaved hysteresis-free GaN-MOS capacitors with extremely low interface state density below 10
cm
eV
were obtained by post-deposition annealing, Ga diffusion into overlying SiO layers severely degraded the insulating property and dielectric breakdown characteristics of the MOS devices. However, this problem was found to be solved by employing rapid thermal processing, leading to superior performance of the GaN-MOS devices in terms of interface quality, insulating property and gate dielectric reliability.
Watanabe, Kenta*; Nozaki, Mikito*; Yamada, Takahiro*; Nakazawa, Satoshi*; Anda, Yoshiharu*; Ishida, Masahiro*; Ueda, Tetsuzo*; Yoshigoe, Akitaka; Hosoi, Takuji*; Shimura, Takayoshi*; et al.
Applied Physics Letters, 111(4), p.042102_1 - 042102_5, 2017/07
Times Cited Count：10 Percentile：22.28(Physics, Applied)AlGaN/GaN HFET (hetero-junction field-effect transitor) has gained much attention as next-generation high frequency and high power devices. In this study, we systematically investigated the interface reaction between Al-based dielectrics (AlO and AlON) and AlGaN layer during deposition and post-deposition annealing (PDA), and revealed high thermal stability of AlON/AlGaN interface.
Yamada, Takahiro*; Ito, Joyo*; Asahara, Ryohei*; Watanabe, Kenta*; Nozaki, Mikito*; Nakazawa, Satoshi*; Anda, Yoshiharu*; Ishida, Masahiro*; Ueda, Tetsuzo*; Yoshigoe, Akitaka; et al.
Journal of Applied Physics, 121(3), p.035303_1 - 035303_9, 2017/01
Times Cited Count：28 Percentile：5.61(Physics, Applied)Initial oxidation of GaN(0001) epilayers and subsequent growth of thermal oxides in dry oxygen ambient were investigated by means of X-ray photoelectron spectroscopy, spectroscopic ellipsometry, atomic force microscopy and X-ray diffraction measurements. It was found that, whereas initial oxide formation tends to saturate at temperatures below 800
C, selective growth of small oxide grains proceeds at dislocations in the epilayers, followed by noticeable grain growth leading to rough surface morphology at higher oxidation temperatures. This indicates that oxide growth and its morphology are crucially dependent on the defect density in the GaN epilayers. Structural characterizations also revealed that polycrystalline 
- and 
-phase GaO grains in an epitaxial relation with the GaN substrate are formed from the initial stage of the oxide growth. On the basis of these experimental findings, we also developed a comprehensive model for GaN oxidation mediated by nitrogen removal and mass transport.
Asahara, Ryohei*; Nozaki, Mikito*; Yamada, Takahiro*; Ito, Joyo*; Nakazawa, Satoshi*; Ishida, Masahiro*; Ueda, Tetsuzo*; Yoshigoe, Akitaka; Hosoi, Takuji*; Shimura, Takayoshi*; et al.
Applied Physics Express, 9(10), p.101002_1 - 101002_4, 2016/10
Times Cited Count：21 Percentile：15.16(Physics, Applied)The superior physical and electrical properties of AlON gate dielectrics on AlGaN/GaN substrates in terms of thermal stability, reliability, and interface quality were demonstrated by direct AlON deposition and subsequent annealing. Nitrogen incorporation into alumina was proven to be beneficial both for suppressing intermixing at the insulator/AlGaN interface and reducing the number of electrical defects in AlO films. Consequently, we achieved high-quality AlON/AlGaN/GaN metal-oxide-semiconductor capacitors with improved stability against charge injection and a reduced interface state density as low as 1.2
10
cmeV. The impact of nitrogen incorporation into the insulator was discussed on the basis of experimental findings.
Nozaki, Mikito*; Ito, Joyo*; Asahara, Ryohei*; Nakazawa, Satoshi*; Ishida, Masahiro*; Ueda, Tetsuzo*; Yoshigoe, Akitaka; Hosoi, Takuji*; Shimura, Takayoshi*; Watanabe, Heiji*
Applied Physics Express, 9(10), p.105801_1 - 105801_4, 2016/10
Times Cited Count：4 Percentile：62.06(Physics, Applied)Interface reactions between Ti-based electrodes and n-type GaN epilayers were investigated by synchrotron radiation X-ray photoelectron spectroscopy. Metallic Ga and thin TiN alloys were formed at the interface by subsequently depositing Al capping layers on ultrathin Ti layers even at room temperature. By comparing results from stacked Ti/Al and single Ti electrodes, the essential role of Al capping layers serving as an oxygen-scavenging element to produce reactive Ti underlayers was demonstrated. Further growth of the metallic interlayer during annealing was observed. A strategy for achieving low-resistance ohmic contacts to n-GaN with low-thermal-budget processing is discussed.
/Ge gate stacks with ultrathin aluminum oxide interlayersAsahara, Ryohei*; Hideshima, Iori*; Oka, Hiroshi*; Minoura, Yuya*; Ogawa, Shingo*; Yoshigoe, Akitaka; Teraoka, Yuden; Hosoi, Takuji*; Shimura, Takayoshi*; Watanabe, Heiji*
Applied Physics Letters, 106(23), p.233503_1 - 233503_4, 2015/06
Times Cited Count：13 Percentile：31.44(Physics, Applied)Advanced metal/high-/Ge gate stacks with a sub-nm equivalent oxide thickness and improved interface properties were demonstrated by controlling interface reactions using ultrathin aluminum oxide (AlOx) interlayers. Comprehensive study by means of physical and electrical characterizations revealed distinct impacts of AlOx interlayers, plasma oxidation.
/Ge gate stack with an extremely thin-EOT by controlling interface reaction using ultrathin AlO interlayerTanaka, Ryohei*; Hideshima, Iori*; Minoura, Yuya*; Yoshigoe, Akitaka; Teraoka, Yuden; Hosoi, Takuji*; Shimura, Takayoshi*; Watanabe, Heiji*
Dai-19-Kai Getosutakku KenkyuKai Yokoshu, p.5 - 8, 2014/01
/Ge gate stacks and its impact on electrical propertiesHosoi, Takuji*; Hideshima, Iori*; Tanaka, Ryohei*; Minoura, Yuya*; Yoshigoe, Akitaka; Teraoka, Yuden; Shimura, Takayoshi*; Watanabe, Heiji*
Microelectronic Engineering, 109, p.137 - 141, 2013/09
Times Cited Count：10 Percentile：39.99(Engineering, Electrical & Electronic)/Ge gate stacks and its impact on electrical propertiesHosoi, Takuji*; Hideshima, Iori*; Minoura, Yuya*; Tanaka, Ryohei*; Yoshigoe, Akitaka; Teraoka, Yuden; Shimura, Takayoshi*; Watanabe, Heiji*
Shingaku Giho, 113(87), p.19 - 23, 2013/06
An understanding of the mechanisms responsible for formation or decomposition of GeO interlayer and Ge diffusion into high- layer is important to develop advanced metal/high- gate stacks for Ge MOSFETs. In this work, we fabricated HfO/GeO/Ge gate stacks by 
oxidation of thin metal Hf layers on Ge substrates. The effect of plasma oxidation on the change in the bonding states of Ge atoms in HfO/GeO/Ge gate stacks and the structural changes induced by metal electrode deposition and thermal annealing was systematically investigated by synchrotron radiation photoemission spectroscopy (SR-PES) and electrical characterization.
Hosoi, Takuji*; Kirino, Takashi*; Uenishi, Yusuke*; Ikeguchi, Daisuke*; Chanthaphan, A.*; Yoshigoe, Akitaka; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; Nakamura, Takashi*; et al.
Workshop digest of 2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2012), p.22 - 25, 2012/06
Watanabe, Heiji*; Hosoi, Takuji*; Kirino, Takashi*; Uenishi, Yusuke*; Chanthaphan, A.*; Yoshigoe, Akitaka; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; Nakamura, Takashi*; et al.
Materials Science Forum, 717-720, p.697 - 702, 2012/05
Times Cited Count：1 Percentile：32.77/4H-SiC interfaceHosoi, Takuji*; Kirino, Takashi*; Chanthaphan, A.*; Uenishi, Yusuke*; Ikeguchi, Daisuke*; Yoshigoe, Akitaka; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; Nakamura, Takashi*; et al.
Materials Science Forum, 717-720, p.721 - 724, 2012/05
Times Cited Count：3 Percentile：9.37N
/Ge structures formed by plasma nitridationHosoi, Takuji*; Kutsuki, Katsuhiro*; Okamoto, Gaku*; Yoshigoe, Akitaka; Teraoka, Yuden; Shimura, Takayoshi*; Watanabe, Heiji*
Japanese Journal of Applied Physics, 50(10), p.10PE03_1 - 10PE03_5, 2011/10
Times Cited Count：11 Percentile：48.11(Physics, Applied)/4H-SiC(0001) interface and its correlation with electrical propertiesWatanabe, Heiji*; Hosoi, Takuji*; Kirino, Takashi*; Kagei, Yusuke*; Uenishi, Yusuke*; Chanthaphan, A.*; Yoshigoe, Akitaka; Teraoka, Yuden; Shimura, Takayoshi*
Applied Physics Letters, 99(2), p.021907_1 - 021907_3, 2011/07
Times Cited Count：83 Percentile：4.43(Physics, Applied) gate dielectrics for SiC power devicesWatanabe, Heiji*; Kirino, Takashi*; Uenishi, Yusuke*; Chanthaphan, A.*; Yoshigoe, Akitaka; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; Nakamura, Takashi*; Hosoi, Takuji*; et al.
ECS Transactions, 35(2), p.265 - 274, 2011/05
Times Cited Count：7 Percentile：5.23/4H-SiC interfaces and its modulation induced by intrinsic and extrinsic interface charge transferWatanabe, Heiji*; Kirino, Takashi*; Kagei, Yusuke*; Harries, J.; Yoshigoe, Akitaka; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; Nakamura, Takashi*; Hosoi, Takuji*; et al.
Materials Science Forum, 679-680, p.386 - 389, 2011/03
Times Cited Count：11 Percentile：1.38Watanabe, Heiji*; Hosoi, Takuji*; Kirino, Takashi*; Uenishi, Yusuke*; Chanthaphan, A.*; Ikeguchi, Daisuke*; Yoshigoe, Akitaka; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; et al.
ECS Transactions, 41(3), p.77 - 90, 2011/00
Times Cited Count：2 Percentile：18.3 gate dielectricsHosoi, Takuji*; Okamoto, Gaku*; Kutsuki, Katsuhiro*; Kagei, Yusuke*; Harries, J.; Yoshigoe, Akitaka; Teraoka, Yuden; Shimura, Takayoshi*; Watanabe, Heiji*
Oyo Butsuri Gakkai Hakumaku, Hyomen Butsuri Bunkakai, Shirikon Tekunoroji Bunkakai Kyosai Tokubetsu Kenkyukai Kenkyu Hokoku, p.145 - 148, 2010/01
We developed high quality high-/Ge gate stacks with reduced leakage current and superior interface quality, which was fabricated by direct deposition of ZrO on Ge substrate and thermal oxidation. Synchrotron radiation photoelectron spectroscopy revealed that thermal oxidation at 823 K caused not only an intermixing between ZrO and Ge but also the formation of GeO at the interlayer. We obtained an equivalent oxide thickness (EOT) of 1.9 nm, and an interface state density of 10 cmeV for Au/ZrO/Ge capacitors. Furthermore, we found that the A10 capping on the Zr0 1ayer is effective for decreasing EOT. The interface state density as low as 5.310 cmeV was obtained for the AlO/ZrO/Ge stack with 30 min oxidation. The EOT could be reduced to l.6 nm by 10 min oxidation. The leakage current was two orders of magnitude lower than the conventional poly-Si/SiO/Si stack.
