JOPSS - Search Results

Journal Articles

Applicability of redundant pairs of SOI transistors for analog circuits and their applications to phase-locked loop circuits

Makihara, Akiko*; Yokose, Tamotsu*; Tsuchiya, Yoshihisa*; Miyazaki, Yoshio*; Abe, Hiroshi; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Maru, Akifumi*; Morikawa, Koichi*; Kuboyama, Satoshi*; et al.

IEEE Transactions on Nuclear Science, 60(1), p.230 - 235, 2013/02

https://doi.org/10.1109/TNS.2012.2237039

Times Cited Count：6 Percentile：41.94(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

Applicability of redundant pairs of SOI transistors for analog circuits

Makihara, Akiko*; Yokose, Tamotsu*; Tsuchiya, Yoshihisa*; Tani, Koichi*; Morimura, Tadaaki*; Abe, Hiroshi; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Maru, Akifumi*; Morikawa, Koichi*; et al.

Proceedings of 10th International Workshop on Radiation Effects on Semiconductor Devices for Space Applications (RASEDA-10) (Internet), p.119 - 122, 2012/12

no abstracts in English

Journal Articles

DICE-based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

Maru, Akifumi*; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Makihara, Akiko*; Hirao, Toshio; Kuboyama, Satoshi*

IEEE Transactions on Nuclear Science, 57(6), p.3602 - 3608, 2010/12

https://doi.org/10.1109/TNS.2010.2086481

Times Cited Count：13 Percentile：63.67(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

DICE based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

Maru, Akifumi*; Kuboyama, Satoshi*; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Makihara, Akiko*; Hirao, Toshio; Tamura, Takashi*

Proceedings of 9th International Workshop on Radiation Effects on Semiconductor Devices for Space Applications (RASEDA-9), p.64 - 67, 2010/10

no abstracts in English

Journal Articles

Evaluation of element circuits constructing new radiation hardened SOI FPGAs

Shindo, Hiroyuki*; Midorikawa, Masahiko*; Sato, Yohei*; Kuboyama, Satoshi*; Hirao, Toshio; Oshima, Takeshi

JAEA-Review 2008-055, JAEA Takasaki Annual Report 2007, P. 5, 2008/11

no abstracts in English

Journal Articles

Optimization for SEU/SET immunity on 0.15 m fully depleted CMOS/SOI digital logic devices

Makihara, Akiko*; Asai, Hiroaki*; Tsuchiya, Yoshihisa*; Amano, Yukio*; Midorikawa, Masahiko*; Shindo, Hiroyuki*; Kuboyama, Satoshi*; Onoda, Shinobu; Hirao, Toshio; Nakajima, Yasuhito*; et al.

Proceedings of 7th International Workshop on Radiation Effects on Semiconductor Devices for Space Application (RASEDA-7), p.95 - 98, 2006/10

no abstracts in English

Journal Articles

Bulk damage observed in recent LSI devices

Shindo, Hiroyuki*; Kuboyama, Satoshi*; Ikeda, Naomi*; Otomo, Hiromitsu*; Shimada, Osamu*; Hirao, Toshio; Matsuda, Sumio*

Proceedings of the 6th International Workshop on Radiation Effects on Semiconductor Devices for Space Application (RASEDA-6), p.63 - 66, 2004/10

no abstracts in English

Journal Articles

Bulk damage caused by single protons in SDRAMs

Shindo, Hiroyuki*; Kuboyama, Satoshi*; Ikeda, Naomi*; Hirao, Toshio; Matsuda, Sumio*

IEEE Transactions on Nuclear Science, 50(6, Part1), p.1839 - 1845, 2003/12

https://doi.org/10.1109/TNS.2003.820727

Times Cited Count：17 Percentile：71.96(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

Consistency of bulk damage factor and NIEL for electrons, protons, and heavy ions in Si CCDs

Kuboyama, Satoshi*; Shindo, Hiroyuki*; Hirao, Toshio; Matsuda, Sumio*

IEEE Transactions on Nuclear Science, 49(6), p.2684 - 2689, 2002/12

https://doi.org/10.1109/TNS.2002.805360

Times Cited Count：10 Percentile：54.08(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

Research of single-event burnout in bipolar transistors

Hirao, Toshio; Shindo, Hiroyuki*; Kuboyama, Satoshi*; Nagai, Yuki*; Ohira, Hideharu*; Ito, Hisayoshi; Matsuda, Sumio*

JNC TN7200 2001-001, p.66 - 68, 2002/01

no abstracts in English

Journal Articles

Analysis of single-ion multiple-bit upset in high-density DRAMs

Makihara, Akiko*; Shindo, Hiroyuki*; Nemoto, Norio*; Kuboyama, Satoshi*; Matsuda, Sumio*; Oshima, Takeshi; Hirao, Toshio; Ito, Hisayoshi; Buchner, S.*; Campbell, A. B.*

IEEE Transactions on Nuclear Science, 47(6), p.2400 - 2404, 2000/12

https://doi.org/10.1109/23.903783

Times Cited Count：33 Percentile：86.87(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

Analysis of single-ion multiple-bit upset in high-density DRAMs

Makihara, Akiko*; Shindo, Hiroyuki*; Nemoto, Norio*; Kuboyama, Satoshi*; Matsuda, Sumio*; Oshima, Takeshi; Hirao, Toshio; Ito, Hisayoshi; Buchner, S.*; Campbell, A. B.*

Proceedings of 4th International Workshop on Radiation Effects on Semiconductor Devices for Space Application, p.103 - 107, 2000/00

no abstracts in English

Journal Articles

SEU testing using cocktail ion beams

Nemoto, N.*; Shindo, Hiroyuki*; ; Kuboyama, Satoshi*; Oshima, Takeshi; Ito, Hisayoshi; Nashiyama, Isamu; Matsuda, Sumio*

Proceedings of 3rd International Workshop on Radiation Effects on Semiconductor Devices for Space Application, p.154 - 159, 1998/00

no abstracts in English

Oral presentation

Feasibility study on a 90 nm bulk CMOS process for applicability to space environments

Maru, Akifumi*; Kuboyama, Satoshi*; Shindo, Hiroyuki*; Ikeda, Naomi*; Tamura, Takashi*; Hirao, Toshio; Abe, Hiroshi; Onoda, Shinobu; Makino, Takahiro; Oshima, Takeshi

no journal, ,

no abstracts in English

Oral presentation

Optimization for SEU/SET immunity on 0.15m fully depleted CMOS/SOI digital logic devices

Makihara, Akiko*; Asai, Hiroaki*; Tsuchiya, Yoshihisa*; Amano, Yukio*; Midorikawa, Masahiko*; Shindo, Hiroyuki*; Kuboyama, Satoshi*; Onoda, Shinobu; Hirao, Toshio; Nakajima, Yasuhito*; et al.

no journal, ,

no abstracts in English

Oral presentation

The Present status and prospect of the development of space LSIs using SOI substrates

Kuboyama, Satoshi*; Shindo, Hiroyuki*; Midorikawa, Masahiko*; Sato, Yohei*; Oshima, Takeshi; Hirao, Toshio; Yokose, Tamotsu*; Makihara, Akiko*

no journal, ,

no abstracts in English

Oral presentation

Study for establishment of radiation-resistant technologies for next-generation space applications

Maru, Akifumi*; Shindo, Hiroyuki*; Kuboyama, Satoshi*; Suzuki, Koichi*; Abe, Hiroshi; Onoda, Shinobu; Makino, Takahiro; Oshima, Takeshi

no journal, ,

no abstracts in English

Oral presentation

Technologies of radiation hardness for deep submicron semiconductor devices; Development of rad-hard high-speed logic circuit using SOI technology

Shindo, Hiroyuki*; Sato, Yohei*; Midorikawa, Masahiko*; Kuboyama, Satoshi*; Makihara, Akiko*; Hirao, Toshio; Ito, Hisayoshi

no journal, ,

no abstracts in English

Oral presentation

Evaluation of new SOI FPGA element circuits with radiation hardness

Shindo, Hiroyuki*; Midorikawa, Masahiko*; Sato, Yohei*; Kuboyama, Satoshi*; Hirao, Toshio

no journal, ,

no abstracts in English

Oral presentation

Analysis of single event phenomena induced by cosmic rays

Kuboyama, Satoshi*; Shindo, Hiroyuki*; Hirao, Toshio; Oshima, Takeshi

no journal, ,

no abstracts in English

Oral presentation

Evaluation and development of a radiation hardness-by-design library for 0.15m SOI-ASIC

Shindo, Hiroyuki*; Maru, Akifumi*; Kuboyama, Satoshi*; Onoda, Shinobu; Hirao, Toshio; Oshima, Takeshi

no journal, ,

no abstracts in English

Presentation/Publication Type

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Applicability of redundant pairs of SOI transistors for analog circuits and their applications to phase-locked loop circuits

Applicability of redundant pairs of SOI transistors for analog circuits

DICE-based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

DICE based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

Evaluation of element circuits constructing new radiation hardened SOI FPGAs

Optimization for SEU/SET immunity on 0.15 m fully depleted CMOS/SOI digital logic devices

Bulk damage observed in recent LSI devices

Bulk damage caused by single protons in SDRAMs

Consistency of bulk damage factor and NIEL for electrons, protons, and heavy ions in Si CCDs

Research of single-event burnout in bipolar transistors

Analysis of single-ion multiple-bit upset in high-density DRAMs

Analysis of single-ion multiple-bit upset in high-density DRAMs

SEU testing using cocktail ion beams

Feasibility study on a 90 nm bulk CMOS process for applicability to space environments

Optimization for SEU/SET immunity on 0.15m fully depleted CMOS/SOI digital logic devices

The Present status and prospect of the development of space LSIs using SOI substrates

Study for establishment of radiation-resistant technologies for next-generation space applications

Technologies of radiation hardness for deep submicron semiconductor devices; Development of rad-hard high-speed logic circuit using SOI technology

Evaluation of new SOI FPGA element circuits with radiation hardness

Analysis of single event phenomena induced by cosmic rays

Evaluation and development of a radiation hardness-by-design library for 0.15m SOI-ASIC