JOPSS - Search Results

Journal Articles

Applicability of redundant pairs of SOI transistors for analog circuits and their applications to phase-locked loop circuits

Makihara, Akiko*; Yokose, Tamotsu*; Tsuchiya, Yoshihisa*; Miyazaki, Yoshio*; Abe, Hiroshi; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Maru, Akifumi*; Morikawa, Koichi*; Kuboyama, Satoshi*; et al.

IEEE Transactions on Nuclear Science, 60(1), p.230 - 235, 2013/02

https://doi.org/10.1109/TNS.2012.2237039

Times Cited Count：6 Percentile：43.8(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

Applicability of redundant pairs of SOI transistors for analog circuits

Makihara, Akiko*; Yokose, Tamotsu*; Tsuchiya, Yoshihisa*; Tani, Koichi*; Morimura, Tadaaki*; Abe, Hiroshi; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Maru, Akifumi*; Morikawa, Koichi*; et al.

Proceedings of 10th International Workshop on Radiation Effects on Semiconductor Devices for Space Applications (RASEDA-10) (Internet), p.119 - 122, 2012/12

no abstracts in English

Journal Articles

DICE-based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

Maru, Akifumi*; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Makihara, Akiko*; Hirao, Toshio; Kuboyama, Satoshi*

IEEE Transactions on Nuclear Science, 57(6), p.3602 - 3608, 2010/12

https://doi.org/10.1109/TNS.2010.2086481

Times Cited Count：13 Percentile：62.2(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

DICE based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

Maru, Akifumi*; Kuboyama, Satoshi*; Shindo, Hiroyuki*; Ebihara, Tsukasa*; Makihara, Akiko*; Hirao, Toshio; Tamura, Takashi*

Proceedings of 9th International Workshop on Radiation Effects on Semiconductor Devices for Space Applications (RASEDA-9), p.64 - 67, 2010/10

no abstracts in English

Journal Articles

Optimization for SEU/SET immunity on 0.15 m fully depleted CMOS/SOI digital logic devices

Makihara, Akiko*; Asai, Hiroaki*; Tsuchiya, Yoshihisa*; Amano, Yukio*; Midorikawa, Masahiko*; Shindo, Hiroyuki*; Kuboyama, Satoshi*; Onoda, Shinobu; Hirao, Toshio; Nakajima, Yasuhito*; et al.

Proceedings of 7th International Workshop on Radiation Effects on Semiconductor Devices for Space Application (RASEDA-7), p.95 - 98, 2006/10

no abstracts in English

Journal Articles

Analysis of single-ion multiple-bit upset in high-density DRAMs

Makihara, Akiko*; Shindo, Hiroyuki*; Nemoto, Norio*; Kuboyama, Satoshi*; Matsuda, Sumio*; Oshima, Takeshi; Hirao, Toshio; Ito, Hisayoshi; Buchner, S.*; Campbell, A. B.*

IEEE Transactions on Nuclear Science, 47(6), p.2400 - 2404, 2000/12

https://doi.org/10.1109/23.903783

Times Cited Count：33 Percentile：87.29(Engineering, Electrical & Electronic)

no abstracts in English

Journal Articles

Analysis of single-ion multiple-bit upset in high-density DRAMs

Makihara, Akiko*; Shindo, Hiroyuki*; Nemoto, Norio*; Kuboyama, Satoshi*; Matsuda, Sumio*; Oshima, Takeshi; Hirao, Toshio; Ito, Hisayoshi; Buchner, S.*; Campbell, A. B.*

Proceedings of 4th International Workshop on Radiation Effects on Semiconductor Devices for Space Application, p.103 - 107, 2000/00

no abstracts in English

Oral presentation

Technologies of radiation hardness for deep submicron semiconductor devices; Development of rad-hard high-speed logic circuit using SOI technology

Shindo, Hiroyuki*; Sato, Yohei*; Midorikawa, Masahiko*; Kuboyama, Satoshi*; Makihara, Akiko*; Hirao, Toshio; Ito, Hisayoshi

no journal, ,

no abstracts in English

Oral presentation

Optimization for SEU/SET immunity on 0.15m fully depleted CMOS/SOI digital logic devices

Makihara, Akiko*; Asai, Hiroaki*; Tsuchiya, Yoshihisa*; Amano, Yukio*; Midorikawa, Masahiko*; Shindo, Hiroyuki*; Kuboyama, Satoshi*; Onoda, Shinobu; Hirao, Toshio; Nakajima, Yasuhito*; et al.

no journal, ,

no abstracts in English

Oral presentation

The Present status and prospect of the development of space LSIs using SOI substrates

Kuboyama, Satoshi*; Shindo, Hiroyuki*; Midorikawa, Masahiko*; Sato, Yohei*; Oshima, Takeshi; Hirao, Toshio; Yokose, Tamotsu*; Makihara, Akiko*

no journal, ,

no abstracts in English

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Applicability of redundant pairs of SOI transistors for analog circuits and their applications to phase-locked loop circuits

Applicability of redundant pairs of SOI transistors for analog circuits

DICE-based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

DICE based flip-flop with SET pulse discriminator on a 90 nm bulk CMOS process

Optimization for SEU/SET immunity on 0.15 m fully depleted CMOS/SOI digital logic devices

Analysis of single-ion multiple-bit upset in high-density DRAMs

Analysis of single-ion multiple-bit upset in high-density DRAMs

Technologies of radiation hardness for deep submicron semiconductor devices; Development of rad-hard high-speed logic circuit using SOI technology

Optimization for SEU/SET immunity on 0.15m fully depleted CMOS/SOI digital logic devices

The Present status and prospect of the development of space LSIs using SOI substrates