Interface engineering of Ge MOS devices with ZrO gate dielectrics

Hosoi, Takuji*; Okamoto, Gaku*; Kutsuki, Katsuhiro*; Kagei, Yusuke*; Harries, J.; Yoshigoe, Akitaka ; Teraoka, Yuden; Shimura, Takayoshi*; Watanabe, Heiji*

We developed high quality high-/Ge gate stacks with reduced leakage current and superior interface quality, which was fabricated by direct deposition of ZrO on Ge substrate and thermal oxidation. Synchrotron radiation photoelectron spectroscopy revealed that thermal oxidation at 823 K caused not only an intermixing between ZrO and Ge but also the formation of GeO at the interlayer. We obtained an equivalent oxide thickness (EOT) of 1.9 nm, and an interface state density of 10 cmeV for Au/ZrO/Ge capacitors. Furthermore, we found that the A10 capping on the Zr0 1ayer is effective for decreasing EOT. The interface state density as low as 5.310 cmeV was obtained for the AlO/ZrO/Ge stack with 30 min oxidation. The EOT could be reduced to l.6 nm by 10 min oxidation. The leakage current was two orders of magnitude lower than the conventional poly-Si/SiO/Si stack.