Impact of stacked AlON/SiO gate dielectrics for SiC power devices

Watanabe, Heiji*; Kirino, Takashi*; Uenishi, Yusuke*; Chanthaphan, A.*; Yoshigoe, Akitaka ; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; Nakamura, Takashi*; Hosoi, Takuji*; Shimura, Takayoshi*

The use of AlON gate insulator for SiC-based MOS power devices is proposed. Although direct deposition of AlON on 4H-SiC substrate causes electrical degradation, the fabricated MOS capacitor with AlON/SiO stacked gate dielectric shows no flatband voltage shift and negligible capacitance-voltage (C-V) hysteresis. Owing to the high dielectric constant of AlON, significant gate leakage reduction was achieved even at high temperatures. Moreover, in order to improve electrical properties of thermally grown SiO/SiC interfaces, the impact of a combination treatment of nitrogen plasma exposure and forming gas annealing was investigated. Channel mobility enhancement of SiC-MOSFETs was consistent with the reduction in interface state density depending on the process conditions of the combination treatment, and obtained 50% mobility enhancement, while maintaining low gate leakage current.