Construction and test of the first Belle II SVD ladder implementing the origami chip-on-sensor design

"origami chip-on-sensor"デザインを取り入れたBelle II SVDラダーの製作とテスト

Irmler, C.*; 谷田 聖   ; 他98名*

Irmler, C.*; Tanida, Kiyoshi; 98 of others*

The Belle II Silicon Vertex Detector comprises four layers of double-sided silicon strip detectors (DSSDs), consisting of ladders with two to five sensors each. All sensors are individually read out by APV25 chips with the Origami chip-on-sensor concept for the central DSSDs of the ladders. The chips sit on flexible circuits that are glued on the top of the sensors. This concept allows a low material budget and an efficient cooling of the chips by a single pipe per ladder. We present the construction of the first SVD ladders and results from precision measurements and electrical tests.