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論文

Construction and test of the first Belle II SVD ladder implementing the origami chip-on-sensor design

Irmler, C.*; 谷田 聖; 他98名*

Journal of Instrumentation (Internet), 11(1), p.C01087_1 - C01087_9, 2016/01

 被引用回数:5 パーセンタイル:34.01(Instruments & Instrumentation)

The Belle II Silicon Vertex Detector comprises four layers of double-sided silicon strip detectors (DSSDs), consisting of ladders with two to five sensors each. All sensors are individually read out by APV25 chips with the Origami chip-on-sensor concept for the central DSSDs of the ladders. The chips sit on flexible circuits that are glued on the top of the sensors. This concept allows a low material budget and an efficient cooling of the chips by a single pipe per ladder. We present the construction of the first SVD ladders and results from precision measurements and electrical tests.

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