Formation of high-quality SiO/GaN interfaces with suppressed Ga-oxide interlayer via sputter deposition of SiO

Onishi, Kentaro*; Kobayashi, Takuma*; Mizobata, Hidetoshi*; Nozaki, Mikito*; Yoshigoe, Akitaka ; Shimura, Takayoshi*; Watanabe, Heiji*

While the formation of an GaO interlayer is key to achieving SiO/GaN interfaces with low defect density, it can affect the reliability and stability of metal-oxide-semiconductor (MOS) devices if the annealing conditions are not properly designed. In the present study, we aimed to minimize the growth of the GaO layer on the basis of the sputter deposition of SiO on GaN. Synchrotron radiation X-ray photoelectron spectrometry measurements confirmed the suppressed growth of the GaO layer compared with a SiO/GaN structure formed by plasma-enhanced chemical vapor deposition. Negligible GaO growth was also observed when subsequent oxygen annealing up to 600C was performed. A MOS device with negligible capacitance-voltage hysteresis, nearly ideal flat-band voltage, and low leakage current was demonstrated by performing oxygen and forming gas annealing at temperatures of 600C and 400C, respectively.