Impact of stacked AlON/SiO gate dielectrics for SiC power devices

渡部 平司*; 桐野 嵩史*; 上西 悠介*; Chanthaphan, A.*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; 細井 卓治*; et al.

ECS Transactions, 35(2), p.265 - 274, 2011/05

https://doi.org/10.1149/1.3568869

The use of AlON gate insulator for SiC-based MOS power devices is proposed. Although direct deposition of AlON on 4H-SiC substrate causes electrical degradation, the fabricated MOS capacitor with AlON/SiO stacked gate dielectric shows no flatband voltage shift and negligible capacitance-voltage (C-V) hysteresis. Owing to the high dielectric constant of AlON, significant gate leakage reduction was achieved even at high temperatures. Moreover, in order to improve electrical properties of thermally grown SiO/SiC interfaces, the impact of a combination treatment of nitrogen plasma exposure and forming gas annealing was investigated. Channel mobility enhancement of SiC-MOSFETs was consistent with the reduction in interface state density depending on the process conditions of the combination treatment, and obtained 50% mobility enhancement, while maintaining low gate leakage current.