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極限EOT実現に向けた極薄AlO$$_{x}$$層によるHigh-$$k$$/Geゲートスタック界面制御

High-$$k$$/Ge gate stack with an extremely thin-EOT by controlling interface reaction using ultrathin AlO$$_{x}$$ interlayer

田中 亮平*; 秀島 伊織*; 箕浦 佑也*; 吉越 章隆; 寺岡 有殿; 細井 卓治*; 志村 考功*; 渡部 平司*

Tanaka, Ryohei*; Hideshima, Iori*; Minoura, Yuya*; Yoshigoe, Akitaka; Teraoka, Yuden; Hosoi, Takuji*; Shimura, Takayoshi*; Watanabe, Heiji*

It has recently been demonstrated an excellent Ge-MOSFET operation with an EOT of 0.76 nm using HfO$$_{2}$$/Al$$_{2}$$O$$_{3}$$/GeO$$_{x}$$/Ge gate stack. However, the role of Al$$_{2}$$O$$_{3}$$ layer in high-$$k$$/Ge stack is not well understood. In this work, we systematically investigated an effect of AlO$$_{x}$$ interlayer on thermal stability and EOT scaling focusing on the Ge diffusion into an overlying HfO$$_{2}$$ layer by means of X-ray photoelectron spectroscopy (XPS) and electrical characterization. It was found that ultrathin AlO$$_{x}$$ interlayer effectively suppresses the metal germanate formation in the high-$$k$$/Ge stack, thus obtaining good electrical properties. An EOT of 0.56 nm with significantly reduced gate leakage was successfully obtained for Pt/HfO$$_{2}$$/AlO$$_{x}$$/GeO$$_{x}$$/Ge gate stack.

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