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論文

Gate stack technologies for silicon carbide power MOS devices

細井 卓治*; 桐野 嵩史*; 上西 悠介*; 池口 大輔*; Chanthaphan, A.*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; et al.

Workshop digest of 2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2012), p.22 - 25, 2012/06

SiC is a promising material for high-power electronic devices. Although SiO$$_{2}$$ film can be grown on SiC by thermal oxidation, low channel mobility and poor gate oxide reliability are the critical issues for SiC power MOSFETs. In this work, we investigated the fundamental aspects of thermally-grown SiO$$_{2}$$/4H-SiC structures such as an energy band alighnment and flatband voltage instability. Both electrical characterization and XPS study revealed that a conduction band offset between SiO$$_{2}$$ and SiC is extrinsically increased. High temperature annealing in H$$_{2}$$ could passivate mobile ions existing in as-oxidized SiO$$_{2}$$/SiC structures. Post-oxidation annealing in Ar eliminates the mobile ions, but they are generated again by subsequent high-temperature hydrogen annealing. These features were not observed for SiO$$_{2}$$/Si structures, and thus considered to be inherent to thermally grown SiO$$_{2}$$/SiC structures.

論文

Synchrotron radiation photoelectron spectroscopy study of thermally grown oxides on 4H-SiC(0001) Si-face and (000-1) C-face substrates

渡部 平司*; 細井 卓治*; 桐野 嵩史*; 上西 悠介*; Chanthaphan, A.*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; et al.

Materials Science Forum, 717-720, p.697 - 702, 2012/05

 被引用回数:2 パーセンタイル:74.09

We investigated the interface between oxide and 4H-SiC(0001) Si-face or (000-1) C-face by synchrotron radiation photoelectron spectroscopy. The Si 2p$$_{3/2}$$ spectra were fitted with bulk SiC and SiO$$_{2}$$ together with intermediate oxides (Si$$^{1+}$$, Si$$^{2+}$$, Si$$^{3+}$$). The total amount of intermediate states was sufficiently small compared with that of the remaining oxides. This implies that the transition layer in the oxide is as thin as a few atomic layers. Moreover, the chemical composition in the bulk region was found to be almost identical to that of the initial SiC surface. These results indicate formation of a near-perfect SiO$$_{2}$$/SiC interface.

論文

Impact of interface defect passivation on conduction band offset at SiO$$_{2}$$/4H-SiC interface

細井 卓治*; 桐野 嵩史*; Chanthaphan, A.*; 上西 悠介*; 池口 大輔*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; et al.

Materials Science Forum, 717-720, p.721 - 724, 2012/05

 被引用回数:5 パーセンタイル:91.69

The energy band alignments of thermally grown SiO$$_{2}$$/SiC structures were investigated by means of synchrotron radiation photoelectron spectroscopy (SR-PES) and electrical characterization of SiC-MOS capacitors. In order to determine the energy band alignments of SiO$$_{2}$$/SiC, band gaps of the thermal oxides and valence band offsets at the interface were examined by SR-PES. SiC-MOS capacitors with Al electrodes were also fabricated to evaluate interface state density and conduction band offset. Experimental results indicate that hydrogen atoms are effective to terminate carbon-related defects. It can be concluded that interface quality degradation due to hydrogen desorption by vacuum annealing causes reduction of conduction band offset for thermally grown SiO$$_{2}$$/SiC structure.

論文

Synchrotron X-ray photoelectron spectroscopy study on thermally grown SiO$$_{2}$$/4H-SiC(0001) interface and its correlation with electrical properties

渡部 平司*; 細井 卓治*; 桐野 嵩史*; 景井 悠介*; 上西 悠介*; Chanthaphan, A.*; 吉越 章隆; 寺岡 有殿; 志村 考功*

Applied Physics Letters, 99(2), p.021907_1 - 021907_3, 2011/07

 被引用回数:112 パーセンタイル:95.37(Physics, Applied)

The correlation between atomic structure and the electrical properties of thermally grown SiO$$_{2}$$/4H-SiC(0001) interfaces was investigated by synchrotron X-ray photoelectron spectroscopy together with electrical measurements of SiC-MOS capacitors. We found that the oxide interface was dominated by Si-O bonds and that there existed no distinct C-rich layer beneath the SiC substrate despite literature. In contrast, intermediate oxide states in Si core-level spectra attributable to atomic scale roughness and imperfection just at the oxide interface increased as thermal oxidation progressed. Electrical characterization of corresponding SiC-MOS capacitors also indicated an accumulation of both negative fixed charges and interface defects, which correlates well with the structural change in the oxide interface and provides insight into the electrical degradation of thermally grown SiC-MOS devices.

論文

Impact of stacked AlON/SiO$$_{2}$$ gate dielectrics for SiC power devices

渡部 平司*; 桐野 嵩史*; 上西 悠介*; Chanthaphan, A.*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; 細井 卓治*; et al.

ECS Transactions, 35(2), p.265 - 274, 2011/05

 被引用回数:8 パーセンタイル:93.3

The use of AlON gate insulator for SiC-based MOS power devices is proposed. Although direct deposition of AlON on 4H-SiC substrate causes electrical degradation, the fabricated MOS capacitor with AlON/SiO$$_{2}$$ stacked gate dielectric shows no flatband voltage shift and negligible capacitance-voltage (C-V) hysteresis. Owing to the high dielectric constant of AlON, significant gate leakage reduction was achieved even at high temperatures. Moreover, in order to improve electrical properties of thermally grown SiO$$_{2}$$/SiC interfaces, the impact of a combination treatment of nitrogen plasma exposure and forming gas annealing was investigated. Channel mobility enhancement of SiC-MOSFETs was consistent with the reduction in interface state density depending on the process conditions of the combination treatment, and obtained 50% mobility enhancement, while maintaining low gate leakage current.

論文

Gate stack technologies for SiC power MOSFETs

渡部 平司*; 細井 卓治*; 桐野 嵩史*; 上西 悠介*; Chanthaphan, A.*; 池口 大輔*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; et al.

ECS Transactions, 41(3), p.77 - 90, 2011/00

 被引用回数:5 パーセンタイル:90.88

It is well known that SiC-based MOS devices have suffered from degraded electrical properties of thermally grown SiO$$_{2}$$/SiC interfaces, such as low inversion carrier mobility and deteriorated gate oxide reliability. This paper overviews the fundamental aspects of SiC-MOS devices and indicates intrinsic obstacles connected with an accumulation of both negative fixed charges and interface defects and with a small conduction band offset of the SiO$$_{2}$$/SiC interface which leading to the increased gate leakage current of MOS devices. To overcome these problems, we proposed using aluminum oxynitride insulators stacked on thin SiO$$_{2}$$ underlayers for SiC-MOS devices. Superior flatband voltage stability of AlON/SiO$$_{2}$$/SiC gate stacks was achieved by optimizing the thickness of the underlayer and nitrogen concentration in the high-k dielectrics. Moreover, we demonstrated reduced gate leakage current and improved current drivability of SiC-MOSFETs with AlON/SiO$$_{2}$$ gate stacks.

口頭

SiO$$_{2}$$/4H-SiC界面構造と伝導帯オフセットの相関

桐野 嵩史*; Chanthaphan, A.*; 池口 大輔*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; 細井 卓治*; 志村 考功*; et al.

no journal, , 

SiO$$_{2}$$/SiC構造の界面特性と伝導帯オフセットの関係を詳細に調べるため、スパッタ成膜で形成したSiO$$_{2}$$/SiC構造の放射光XPS測定を行い、熱酸化SiO$$_{2}$$/SiC構造と比較した。スパッタ膜のSiO$$_{2}$$/SiC界面では熱酸化膜と比較して高価数成分が減少し、サブオキサイド成分の総量が少ないことが明らかとなった。またスパッタ試料のSiO$$_{2}$$ピークは熱酸化試料と比較して0.24eV高結合エネルギー側にシフトし、SiO$$_{2}$$/SiC界面の伝導帯オフセットが小さいことを示唆する結果を得た。O1sエネルギー損失スペクトルよりSiO$$_{2}$$のバンドギャップを、また、高運動エネルギー領域に見られる価電子帯スペクトルよりSiO$$_{2}$$/SiC構造の価電子帯オフセットを求めた。伝導帯オフセットは熱酸化膜よりスパッタ膜の方が約0.35eV小さい結果を得た。

口頭

SiO$$_{2}$$/4H-SiCエネルギーバンド構造に対する界面特性改善処理の影響

細井 卓治*; 桐野 嵩史*; Chanthaphan, A.*; 池口 大輔*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; 志村 考功*; et al.

no journal, , 

SiC-MOSデバイスの信頼性を左右するSiO$$_{2}$$/SiC界面の伝導帯オフセットについて、放射光光電子分光法により評価した。SiO$$_{2}$$膜をスパッタ堆積により形成した場合、熱酸化膜よりも伝導帯オフセットが小さく、また高温水素ガスアニールにより熱酸化SiO$$_{2}$$/SiC界面の炭素不純物起因の界面欠陥は低減される一方で、伝導帯オフセットもまた減少することがわかった。

口頭

高性能パワーデバイス用SiC-MOS構造の界面物性評価とその特性改善技術の開発

細井 卓治*; 桐野 嵩史*; Chanthaphan, A.*; 池口 大輔*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; 志村 考功*; et al.

no journal, , 

シリコンカーバイド(SiC)は、高耐圧・低損失な次世代パワーMOSデバイス用材料として注目されている。熱酸化過程でSiC基板のSiがO$$_{2}$$と反応してSiO$$_{2}$$を形成する。残留炭素不純物がSiO$$_{2}$$/SiC界面に偏析して界面欠陥を生成することがSiCデバイス実現の大きな障壁となっている。また、SiO$$_{2}$$/SiC界面の伝導帯オフセットが小さいためにリーク電流が流れやすいのも問題である。本研究ではSiO$$_{2}$$層の形成方法や水素導入による界面改質処理がSiO$$_{2}$$/SiC界面構造と伝導帯オフセットに及ぼす影響を放射光光電子分光により評価した。高温水素ガスアニールを施した場合、熱酸化のみの試料と比較して高価数成分が減少してサブオキサイド総量が少ないことが明らかとなった。伝導帯オフセットは熱酸化試料と比較して小さい値を示した。熱酸化SiO$$_{2}$$/SiC構造の界面特性と伝導帯オフセットはトレードオフの関係にあり、高性能・高信頼SiC-MOSデバイスの実現にはこれらを両立させるプロセスの構築が必須である。

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