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Gate stack technologies for silicon carbide power MOS devices

電力用炭化シリコンMOSデバイスのためのゲートスタック技術

細井 卓治*; 桐野 嵩史*; 上西 悠介*; 池口 大輔*; Chanthaphan, A.*; 吉越 章隆; 寺岡 有殿; 箕谷 周平*; 中野 佑紀*; 中村 孝*; 志村 考功*; 渡部 平司*

Hosoi, Takuji*; Kirino, Takashi*; Uenishi, Yusuke*; Ikeguchi, Daisuke*; Chanthaphan, A.*; Yoshigoe, Akitaka; Teraoka, Yuden; Mitani, Shuhei*; Nakano, Yuki*; Nakamura, Takashi*; Shimura, Takayoshi*; Watanabe, Heiji*

SiC is a promising material for high-power electronic devices. Although SiO$$_{2}$$ film can be grown on SiC by thermal oxidation, low channel mobility and poor gate oxide reliability are the critical issues for SiC power MOSFETs. In this work, we investigated the fundamental aspects of thermally-grown SiO$$_{2}$$/4H-SiC structures such as an energy band alighnment and flatband voltage instability. Both electrical characterization and XPS study revealed that a conduction band offset between SiO$$_{2}$$ and SiC is extrinsically increased. High temperature annealing in H$$_{2}$$ could passivate mobile ions existing in as-oxidized SiO$$_{2}$$/SiC structures. Post-oxidation annealing in Ar eliminates the mobile ions, but they are generated again by subsequent high-temperature hydrogen annealing. These features were not observed for SiO$$_{2}$$/Si structures, and thus considered to be inherent to thermally grown SiO$$_{2}$$/SiC structures.

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